There are two prevailing themes in solar manufacturing, cost down and efficiency up. The reasons why Direct Wafer® dramatically reduces costs are well understood – manufacturing a product more efficiently and with lean principles will result in an ultra-low cost wafer. But the limits of conventional sawing are not just tied to cost, ingot-based manufacturing also restricts both efficiency potential and opportunities for the wafer to improve. Because the Direct Wafer process allows for access to the wafer surface during growth, we’re able to introduce new wafer features that are impossible through conventional manufacturing.
More than 50 years ago, it was proposed and modeled that a doping gradient could be established in a wafer. This doping gradient could generate an electric field to guide electrons towards the cell junction for more effective collection and, therefore, boost efficiency. However, manipulating dopant concentration is impossible with standard multi or sawn wafers because there is no cost effective way to introduce the doping profile to create the electric field. Wafers made with the Direct Wafer process, however, can be produced with a steep gradient in dopant concentration between the front and the back of the wafer. This is possible because each wafer is grown individually and the concentration of the dopant can be controlled in the melt as the wafer forms and is cooled.
As seen in the figure on the left, typical dopant concentration of a standard cell is uniform. Free electrons generated in the bulk of the wafer move about randomly and only a fraction of them will be collected at the cell’s front emitter before they recombine, relaxing back to their equilibrium states. Dopant concentration in a Direct Wafer cell can be engineered differently. In the image on the right, a steep gradient in dopant is visible from the front to the back. This feature, a first for the solar industry, provides a significant benefit: electrons generated from sunlight can be collected far earlier than if they were on a “random walk.” This leads to a significant boost in efficiency, resulting in at least a 0.3% absolute increase.
Doping gradient brings additional benefits, especially for the emerging PERC cell architecture. The higher voltages achieved from improved rear passivation are amplified further when a doping gradient is provided to increase carrier concentration on the backside of the cell. The front surface concentration need not change while allowing for lower average bulk resistivity without concern for Irev breakdown. The result is an increased effective lifetime, and the lower resistivity also benefits lateral carrier transport within the bulk for lower series resistance and improved fill factor. This is particularly important for PERC cells, where holes must transport between local rear contacts.
The introduction of a doping gradient to a wafer is one of several interesting R&D achievements made possible when producing wafers directly from molten silicon. These achievements fundamentally change the wafer’s role in contributing to higher efficiencies and lower costs, and will transform how cell and module manufacturers think about wafer features.