Electrical quality and the subsequent efficiency potential of silicon wafers are determined by impurities and their interactions with crystallographic defects, mainly dislocations. When compared to the conventional ingot pulling or casting technologies required for mono- or multi-crystalline wafers, the Direct Wafer technology has clear advantages with respect to maintaining the purity of the silicon and controlling the formation of dislocations during production.
During ingot growth, thermal gradients and related stresses promote the formation and multiplication of dislocations as the crystal structure forms within the solidifying block. In contrast, Direct Wafer product is grown as a sheet, where the removal of heat is normal to the wafer plane, the low thermal stress inhibits dislocation formation and there is no propagation from one wafer to the next. The formation of large dislocation clusters found in cast multi-crystalline silicon wafers does not occur in Direct Wafer. It has recently been found that smaller crystal grains in multi help to lower the dislocation density, enabling higher lifetime (the length of time before charge carriers recombine in a semiconductor). This is also true for the Direct Wafer method which enables consistent control of the nucleation and growth for every wafer, with the grain size currently tuned for optimal performance between 0.5 to 1.0 mm. The resulting grain boundaries are perpendicular to the wafer surface and are well-passivated by hydrogen during standard cell processing, meaning they do not play a significant role in bulk recombination of the finished cell.
Maintaining silicon purity in traditional ingot pulling and casting is very challenging because of the contact between the silicon and a relatively “dirty” slip cast quartz crucible and release coating for tens of hours at or close to the silicon melting point. During silicon casting, significant in-diffusion of impurities from the crucible and crucible lining into the solidified crystal occurs. This leads to the degradation of electrical properties along the ingot border, a centimeter-wide region referred to as the “red zone”. It is too poor-quality to be processed into wafers and must be discarded. During Czochralski growth (used for mono wafers), impurities build up in the melt over time, limiting the number of ingots or the cumulative volume of silicon grown before impurities degrade performance. The Direct Wafer growth occurs in a higher purity environment and each wafers is removed from the hot zone within a few seconds of solidification, thus limiting potential time for in-diffusion of impurities. In addition, a specific mechanism prevents the buildup of impurities in the melt over time, allowing the Direct Wafer process to deliver demonstrated stable efficiency over growth periods greater than six weeks (as shown in the image below).
ICPMS results below demonstrate the various metals and levels detected in cast multi-crystalline wafers and in Direct Wafer product, based on an average of measurements of 10 different wafers of each type. The purity advantages of the Direct Wafer growth environment are clearly visible, with most metals being present in up to two orders of magnitude lower concentration than in standard multi wafers.
Purity directly translates to wafer quality. The ability for the Direct Wafer process to produce wafers without contaminants equates to a better product that can still be delivered at an ultra low cost.